Imec and SPTS Technologies, an Orbotech company announced at SEMICON West that they are jointly developing a highly accurate, short cycle-time dry silicon removal and low temperature passivation solution for through-silicon via-middle processing and thinning of the top-wafer in wafer-to-wafer bonding.   Wafer backside processing is critical for 3D-IC wafer stacking. Today, through-silicon vias (TSV) formed using ‘via-middle’ processing, are typically exposed from the backside of 300mm device w...